// gfambrtucom.h : // #if !defined(AGD_GFAMODBUS_H__C0642473_3513_4FB4_9D7B_F81E8ACC2C34__INCLUDED_) #define AGD_GFAMODBUS_H__C0642473_3513_4FB4_9D7B_F81E8ACC2C34__INCLUDED_ #include #include #include #ifdef __cplusplus extern "C" { #endif // __cplusplus ///////////////////////////////////////////////////////////////////////////// // gfambrtucom.h - Declarations: #ifndef __BYTE_ORDER__ #define __ORDER_LITTLE_ENDIAN__ 1234 #define __ORDER_BIG_ENDIAN__ 4321 #define __ORDER_PDP_ENDIAN__ 3412 #if defined(__little_endian__) #define __BYTE_ORDER__ __ORDER_LITTLE_ENDIAN__ #elif defined(__big_endian__) #define __BYTE_ORDER__ __ORDER_BIG_ENDIAN__ #else #error No endianess defined! #endif // __LITTLE_ENDIAN__ #endif // __BYTE_ORDER__ ///////////////////////////////////////////////////////////////////////////// #ifndef _countof #define _countof(a) (sizeof(a) / sizeof(*a)) #endif // _countof ///////////////////////////////////////////////////////////////////////////// ///////////////////////////////////////////////////////////////////////////// ///////////////////////////////////////////////////////////////////////////// // Modbus RTU common defines #define MB_FUNC_READ_COIL_STATUS ((uint8_t)0x01) #define MB_FUNC_READ_INPUT_STATUS ((uint8_t)0x02) #define MB_FUNC_READ_HOLDING_REGISTERS ((uint8_t)0x03) #define MB_FUNC_READ_INPUT_REGISTERS ((uint8_t)0x04) #define MB_FUNC_FORCE_SINGLE_COIL ((uint8_t)0x05) #define MB_FUNC_PRESET_SINGLE_REGISTER ((uint8_t)0x06) #define MB_FUNC_READ_EXCEPTION_STATUS ((uint8_t)0x07) #define MB_FUNC_DIAGNOSTIC ((uint8_t)0x08) #define MB_FUNC_FETCH_COMM_EVENT_CTR ((uint8_t)0x0B) #define MB_FUNC_FETCH_COMM_EVENT_LOG ((uint8_t)0x0C) #define MB_FUNC_FORCE_MULTIPLE_COILS ((uint8_t)0x0F) #define MB_FUNC_WRITE_MULTIPLE_REGISTERS ((uint8_t)0x10) #define MB_FUNC_REPORT_SLAVE_ID ((uint8_t)0x11) #define MB_FUNC_READ_GENERAL_REFERENCE ((uint8_t)0x14) #define MB_FUNC_WRITE_GENERAL_REFERENCE ((uint8_t)0x15) #define MB_FUNC_MASK_WRITE_4X_REGISTER ((uint8_t)0x16) #define MB_FUNC_READ_WRITE_4X_REGISTERS ((uint8_t)0x17) #define MB_FUNC_READ_FIFO_QUEUE ((uint8_t)0x18) #define MB_FUNC_ERROR_FLAG ((uint8_t)0x80) ///////////////////////////////////////////////////////////////////////////// #define MB_SUBFUNC_RETURN_QUERY_DATA ((uint16_t)0x00) #define MB_SUBFUNC_RESTART_COMM_OPTION ((uint16_t)0x01) #define MB_SUBFUNC_RETURN_DIAGNOSTIC_REGISTER ((uint16_t)0x02) #define MB_SUBFUNC_FORCE_LISTEN_ONLY_MODE ((uint16_t)0x04) #define MB_SUBFUNC_CLEAR_CTRS_AND_DIAGNOSTIC_REG ((uint16_t)0x0A) #define MB_SUBFUNC_RETURN_BUS_MESSAGE_COUNT ((uint16_t)0x0B) #define MB_SUBFUNC_RETURN_BUS_COMM_ERROR_COUNT ((uint16_t)0x0C) #define MB_SUBFUNC_RETURN_BUS_EXCEPTION_ERROR_COUNT ((uint16_t)0x0D) #define MB_SUBFUNC_RETURN_SLAVE_MESSAGE_COUNT ((uint16_t)0x0E) #define MB_SUBFUNC_RETURN_SLAVE_NO_RESPONSE_COUNT ((uint16_t)0x0F) #define MB_SUBFUNC_RETURN_SLAVE_NAK_COUNT ((uint16_t)0x10) #define MB_SUBFUNC_RETURN_SLAVE_BUSY_COUNT ((uint16_t)0x11) #define MB_SUBFUNC_RETURN_BUS_CHAR_OVERRUN_COUNT ((uint16_t)0x12) #define MB_SUBFUNC_RETURN_OVERRUN_ERROR_COUNT ((uint16_t)0x13) #define MB_SUBFUNC_CLEAR_OVERRUN_COUNTER_AND_FLAG ((uint16_t)0x14) ///////////////////////////////////////////////////////////////////////////// #define MB_ERROR_ILLEGAL_FUNCTION ((uint8_t)0x01) #define MB_ERROR_ILLEGAL_DATA_ADDRESS ((uint8_t)0x02) #define MB_ERROR_ILLEGAL_DATA_VALUE ((uint8_t)0x03) #define MB_ERROR_SLAVE_DEVICE_FAILURE ((uint8_t)0x04) #define MB_ERROR_ACKNOWLEDGE ((uint8_t)0x05) #define MB_ERROR_SLAVE_DEVICE_BUSY ((uint8_t)0x06) #define MB_ERROR_NEGATIVE_ACKNOWLEDGE ((uint8_t)0x07) #define MB_ERROR_MEMORY_PARITY_ERROR ((uint8_t)0x08) ///////////////////////////////////////////////////////////////////////////// #define MODBUS_BROADCAST_ADDRESS 0 #define MODBUS_MAX_SLAVE_ID 247 #define MODBUS_MAX_READ_BITS 2000 #define MODBUS_MAX_WRITE_BITS 1968 #define MODBUS_MAX_READ_REGISTERS 125 #define MODBUS_MAX_WRITE_REGISTERS 123 #define MODBUS_MAX_RW_WRITE_REGISTERS 121 #define MODBUS_MAX_DATA_PAYLOAD 252 ///////////////////////////////////////////////////////////////////////////// typedef struct _MODBUS_RTU_PDU { uint8_t func; union { uint8_t b[254]; uint16_t w[127]; }; }__attribute__ ((__packed__)) MODBUS_RTU_PDU, *LPMODBUS_RTU_PDU; typedef const MODBUS_RTU_PDU *LPCMODBUS_RTU_PDU; typedef struct _MODBUS_RTU_ADU { uint8_t slaveID; MODBUS_RTU_PDU pdu; }__attribute__ ((__aligned__(2),__packed__)) MODBUS_RTU_ADU, *LPMODBUS_RTU_ADU; typedef const MODBUS_RTU_ADU *LPCMODBUS_RTU_ADU; ///////////////////////////////////////////////////////////////////////////// ///////////////////////////////////////////////////////////////////////////// ///////////////////////////////////////////////////////////////////////////// // Fifo typedef void *HFIFO; typedef bool (*PFN_GFA_INT_ENABLE)(bool); typedef bool (*PFN_GFA_RX_PREPARE)(void); typedef void (*PFN_GFA_RX_START)(void); typedef bool (*PFN_GFA_RX_FINALIZE)(void); typedef bool (*PFN_GFA_TX_PREPARE)(void); typedef void (*PFN_GFA_TX_START)(void); typedef bool (*PFN_GFA_TX_FINALIZE)(void); ///////////////////////////////////////////////////////////////////////////// typedef struct _GFA_FIFO_BACKEND { PFN_GFA_INT_ENABLE pfnLockBackend; PFN_GFA_RX_PREPARE pfnRxPrepare; PFN_GFA_RX_START pfnRxStart; PFN_GFA_RX_FINALIZE pfnRxFinalize; PFN_GFA_TX_PREPARE pfnTxPrepare; PFN_GFA_TX_START pfnTxStart; PFN_GFA_TX_FINALIZE pfnTxFinalize; }GFA_FIFO_BACKEND, *LPGFA_FIFO_BACKEND; typedef const GFA_FIFO_BACKEND *LPCGFA_FIFO_BACKEND; ///////////////////////////////////////////////////////////////////////////// HFIFO GfaMbFifoCreate(int nFifoIndex, LPCGFA_FIFO_BACKEND pBackend); void GfaMbFifoRelease(HFIFO hFifo); void GfaMbFifoReset(HFIFO hFifo, bool bLock); size_t GfaMbFifoRead(HFIFO hFifo, void *pData, size_t nCbData, bool bLock); size_t GfaMbFifoWrite(HFIFO hFifo, const void *pData, size_t nCbData, bool bLock); bool GfaMbFifoPop(HFIFO hFifo, uint8_t *b, bool bLock); bool GfaMbFifoPush(HFIFO hFifo, uint8_t b, bool bLock); size_t GfaMbFifoPeek(HFIFO hFifo, bool bLock); bool GfaMbFifoCanWrite(HFIFO hFifo, bool bLock); bool GfaMbFifoEmpty(HFIFO hFifo, bool bLock); void GfaMbFifoSetFlags(HFIFO hFifo, uint32_t nFlags, bool bLock); void GfaMbFifoClearFlags(HFIFO hFifo, uint32_t nFlags, bool bLock); uint32_t GfaMbFifoGetFlags(HFIFO hFifo, bool bLock); bool GfaMbFifoMatchFlags(HFIFO hFifo, uint32_t nFlags, bool bLock); bool GfaMbFifoRxPrepare(HFIFO hFifo, bool bLock); void GfaMbFifoRxStart(HFIFO hFifo, bool bLock); bool GfaMbFifoRxFinalize(HFIFO hFifo, bool bLock); bool GfaMbFifoTxPrepare(HFIFO hFifo, bool bLock); void GfaMbFifoTxStart(HFIFO hFifo, bool bLock); bool GfaMbFifoTxFinalize(HFIFO hFifo, bool bLock); uint16_t GfaMbFifoCalcCRC(HFIFO hFifo, bool bLock); ///////////////////////////////////////////////////////////////////////////// ///////////////////////////////////////////////////////////////////////////// ///////////////////////////////////////////////////////////////////////////// // UART typedef enum _GfA_UART_Parity { P_None, P_Even, P_Odd, P_Zero, P_One }GfA_UART_Parity; ///////////////////////////////////////////////////////////////////////////// typedef struct _GFA_MODBUS_PROTOCOL_TIMEOUTS { uint64_t nCharTimeoutUs; uint64_t nFrameTimeoutUs; }GFA_MODBUS_PROTOCOL_TIMEOUTS, *LPGFA_MODBUS_PROTOCOL_TIMEOUTS; typedef const GFA_MODBUS_PROTOCOL_TIMEOUTS *LPCGFA_MODBUS_PROTOCOL_TIMEOUTS; ///////////////////////////////////////////////////////////////////////////// inline bool GfaMbCalcProtocolTimeouts(uint32_t nBaud, LPGFA_MODBUS_PROTOCOL_TIMEOUTS pmpt) { if(nBaud && pmpt) { if(nBaud <= 19200) { pmpt->nFrameTimeoutUs = (350000000 / nBaud + 5) / 10; pmpt->nCharTimeoutUs = (150000000 / nBaud + 5) / 10; } else { // For baud rates greater than 19200 the t1.5 and t3.5 timers are implemented // using fixed values, for t1.5 that is 750μs, for t3.5 1.750ms pmpt->nFrameTimeoutUs = 1750; pmpt->nCharTimeoutUs = 750; } return true; } return false; } ///////////////////////////////////////////////////////////////////////////// typedef struct _GFA_UART_CONFIG { uint32_t P_UART_BASE; uint32_t P_UART_BASE_SYSCTL; uint32_t P_UART_PORT; uint32_t P_UART_PORT_SYSCTL; uint32_t P_UART_RX_PIN; uint32_t P_UART_RX_PIN_MUX; uint32_t P_UART_TX_PIN; uint32_t P_UART_TX_PIN_MUX; uint32_t P_UART_INT; uint8_t P_UART_INT_PRIORITY; uint32_t P_EN_485_PORT_SYSCTL; uint32_t P_EN_485_PORT; uint32_t P_EN_485_PIN; uint32_t nBaud; int nDatabits; int nStopbits; GfA_UART_Parity parity; int nFifoIndexRx; int nFifoIndexTx; }GFA_UART_CONFIG, *LPGFA_UART_CONFIG; typedef const GFA_UART_CONFIG *LPCGFA_UART_CONFIG; ///////////////////////////////////////////////////////////////////////////// typedef struct _GFA_UART_STATUS_COUNTERS { uint64_t nCharsReceived; uint64_t nCharsTransmitted; uint32_t nOverrunErrors; uint32_t nBreakErrors; uint32_t nParityErrors; uint32_t nFramingErrors; }GFA_UART_STATUS_COUNTERS, *LPGFA_UART_STATUS_COUNTERS; typedef const GFA_UART_STATUS_COUNTERS *LPCGFA_UART_STATUS_COUNTERS; ///////////////////////////////////////////////////////////////////////////// #define MB_RTU_FLAG_FRAME_GAP_DETECT 0x00000001 #define MB_RTU_FLAG_TRANSMIT_IN_PROGRESS 0x00000002 #define MB_RTU_FLAG_TRANSMIT_END 0x00000004 #define MB_RTU_FLAG_IGNORE_FRAME 0x00000008 #define MB_RTU_FLAG_OVERRUN_ERROR 0x00000010 #define MB_RTU_FLAG_BREAK_ERROR 0x00000020 #define MB_RTU_FLAG_PARITY_ERROR 0x00000040 #define MB_RTU_FLAG_FRAMING_ERROR 0x00000080 ///////////////////////////////////////////////////////////////////////////// bool GfaMbUartInit(LPCGFA_UART_CONFIG pCfg); void GfaMbUartRelease(void); HFIFO GfaMbUartGetRxFifo(void); HFIFO GfaMbUartGetTxFifo(void); void GfaMbUartGetProtocolTimeouts(LPGFA_MODBUS_PROTOCOL_TIMEOUTS pmpt); void GfaMbUartGetStatusCounters(LPGFA_UART_STATUS_COUNTERS pSc); void GfaMbUartResetStatusCounters(void); ///////////////////////////////////////////////////////////////////////////// ///////////////////////////////////////////////////////////////////////////// ///////////////////////////////////////////////////////////////////////////// // Buffer helper functions void GfaBufCpyUnaligned_uint16_LE(void *pTo, const void *pFrom, size_t nCntWords); void GfaBufCpyUnaligned_uint16_BE(void *pTo, const void *pFrom, size_t nCntWords); void GfaBufCpyUnaligned_uint32_LE(void *pTo, const void *pFrom, size_t nCntDWords); void GfaBufCpyUnaligned_uint32_BE(void *pTo, const void *pFrom, size_t nCntDWords); uint16_t GfaBufGetUnaligned_uint16_LE(const void *pData); uint16_t GfaBufGetUnaligned_uint16_BE(const void *pData); void GfaBufSetUnaligned_uint16_LE(void *pData, uint16_t nVal); void GfaBufSetUnaligned_uint16_BE(void *pData, uint16_t nVal); uint32_t GfaBufGetUnaligned_uint32_LE(const void *pData); uint32_t GfaBufGetUnaligned_uint32_BE(const void *pData); void GfaBufSetUnaligned_uint32_LE(void *pData, uint16_t nVal); void GfaBufSetUnaligned_uint32_BE(void *pData, uint16_t nVal); float GfaBufGetUnaligned_float(const void *pData); void GfaBufSetUnaligned_float(void *pData, float fVal); double GfaBufGetUnaligned_double(const void *pData); void GfaBufSetUnaligned_double(void *pData, double fVal); bool GfaBufVerifyCRC(const void *pData, size_t nCbData, const void *pCRC); void GfaBufSetCRC(const void *pData, size_t nCbData, void *pCRC); #if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__ #define GfaBufCpyUnaligned_uint16 GfaBufCpyUnaligned_uint16_LE #define GfaBufCpyUnaligned_uint32 GfaBufCpyUnaligned_uint32_LE #define GfaBufGetUnaligned_uint16 GfaBufGetUnaligned_uint16_LE #define GfaBufSetUnaligned_uint16 GfaBufSetUnaligned_uint16_LE #define GfaBufGetUnaligned_uint32 GfaBufGetUnaligned_uint32_LE #define GfaBufSetUnaligned_uint32 GfaBufSetUnaligned_uint32_LE #elif __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__ #define GfaBufCpyUnaligned_uint16 GfaBufCpyUnaligned_uint16_BE #define GfaBufCpyUnaligned_uint32 GfaBufCpyUnaligned_uint32_BE #define GfaBufGetUnaligned_uint16 GfaBufGetUnaligned_uint16_BE #define GfaBufSetUnaligned_uint16 GfaBufSetUnaligned_uint16_BE #define GfaBufGetUnaligned_uint32 GfaBufGetUnaligned_uint32_BE #define GfaBufSetUnaligned_uint32 GfaBufSetUnaligned_uint32_BE #endif // __BYTE_ORDER__ ///////////////////////////////////////////////////////////////////////////// #ifdef __cplusplus } #endif // __cplusplus #endif // !defined(AGD_GFAMODBUS_H__C0642473_3513_4FB4_9D7B_F81E8ACC2C34__INCLUDED_)