boot/xilinx-embeddedsw: add versal2 support

Add support for Xilinx versal2 devices which include two new applications
for the xilinx-embeddedsw package.

BR2_TARGET_XILINX_EMBEDDEDSW_VERSAL2_PLM
There is a new PLM (platform loader and manager) application for versal2
devices. The purpose of the PLM is to act as the bootloader for loading the
boot.pdi to configure the DDR memory and then loading arm-trusted-firmware and
u-boot on the Cortex-A78 core 0.

BR2_TARGET_XILINX_EMBEDDEDSW_VERSAL2_ASUFW
Included with versal2 devices is a risc-v based security accelerator called
the ASU (application security unit). The ASUFW is the open-source application
which runs on the ASU.

Versal2 devices simplified the boot process by getting rid of the second
microblaze core called the PSM (processor system manager). There is thus no
longer a need for a separate psmfw application like with the original versal
devices, as this functionality is now fully included in the new PLM for
versal2.

For more information about the Xilinx Versal Gen2 series:
https://www.amd.com/en/products/adaptive-socs-and-fpgas/versal/gen2/ai-edge-series.html
https://www.amd.com/en/products/adaptive-socs-and-fpgas/versal/gen2/prime-series.html

Signed-off-by: Neal Frager <neal.frager@amd.com>
Signed-off-by: Julien Olivain <ju.o@free.fr>

boot/Config.in

@@ -4,7 +4,7 @@ config BR2_TARGET_XILINX_FIRMWARE_ARCH_SUPPORTS
 	# All Xilinx SoCs using this package are aarch64 only
 	depends on BR2_aarch64
 	# only CPUs with corresponding firmwares:
-	depends on BR2_cortex_a53 || BR2_cortex_a72
+	depends on BR2_cortex_a53 || BR2_cortex_a72 || BR2_cortex_a78
 
 menu "Bootloaders"
 

boot/xilinx-embeddedsw/Config.in

@@ -1,5 +1,6 @@
 comment "xilinx-embeddedsw needs a bare metal toolchain for tuple microblazeel-buildroot-elf"
 	depends on BR2_TOOLCHAIN_BARE_METAL_BUILDROOT_ARCH != "microblazeel-buildroot-elf"
+	depends on BR2_TOOLCHAIN_BARE_METAL_BUILDROOT_ARCH != "microblazeel-buildroot-elf riscv32-buildroot-elf"
 	depends on BR2_TOOLCHAIN_BARE_METAL_BUILDROOT
 
 menuconfig BR2_TARGET_XILINX_EMBEDDEDSW
@@ -26,6 +27,28 @@ config BR2_TARGET_XILINX_EMBEDDEDSW_VERSION
 	  Release version of Xilinx/embeddedsw.
 	  Must be xilinx_v2023.1 or newer.
 
+config BR2_TARGET_XILINX_EMBEDDEDSW_VERSAL2_ASUFW
+	bool "versal2 asufw"
+	depends on BR2_cortex_a78
+	help
+	  Build versal2 asufw application from Xilinx/embeddedsw
+	  repo.
+
+	  https://github.com/Xilinx/embeddedsw/tree/master/lib/sw_apps/asufw
+	  Version must be xilinx_v2025.2 or newer.
+
+config BR2_TARGET_XILINX_EMBEDDEDSW_VERSAL2_PLM
+	bool "versal2 plm"
+	depends on BR2_cortex_a78
+	help
+	  Build versal2 plm application from Xilinx/embeddedsw repo.
+	  If selected, the xilinx-prebuilt package will not install
+	  the plm.elf since it will come from the xilinx-embeddedsw
+	  package.
+
+	  https://github.com/Xilinx/embeddedsw/tree/master/lib/sw_apps/versal_plm
+	  Version must be xilinx_v2025.2 or newer.
+
 config BR2_TARGET_XILINX_EMBEDDEDSW_VERSAL_PLM
 	bool "versal plm"
 	depends on BR2_cortex_a72

boot/xilinx-embeddedsw/xilinx-embeddedsw.mk

@@ -30,6 +30,38 @@ XILINX_EMBEDDEDSW_ZYNQMP_PMUFW_CFLAGS = \
 	"-Os -flto -ffat-lto-objects $(XILINX_EMBEDDEDSW_ZYNQMP_PMUFW_USER_CFLAGS)"
 
 XILINX_EMBEDDEDSW_CFLAGS = "-Os -flto -ffat-lto-objects"
+XILINX_EMBEDDEDSW_ASUFW_CFLAGS = "-O2 -ffat-lto-objects -fno-lto"
+
+ifeq ($(BR2_TARGET_XILINX_EMBEDDEDSW_VERSAL2_ASUFW),y)
+define XILINX_EMBEDDEDSW_BUILD_VERSAL2_ASUFW
+	$(MAKE) -C $(@D)/lib/sw_apps/asufw/src \
+		COMPILER=$(HOST_DIR)/bin/riscv32-buildroot-elf-gcc \
+		ARCHIVER=$(HOST_DIR)/bin/riscv32-buildroot-elf-gcc-ar \
+		CC=$(HOST_DIR)/bin/riscv32-buildroot-elf-gcc \
+		CFLAGS=$(XILINX_EMBEDDEDSW_ASUFW_CFLAGS)
+endef
+
+define XILINX_EMBEDDEDSW_INSTALL_VERSAL2_ASUFW
+	$(INSTALL) -D -m 0755 $(@D)/lib/sw_apps/asufw/src/asufw.elf \
+		$(BINARIES_DIR)/asufw.elf
+endef
+endif # BR2_TARGET_XILINX_EMBEDDEDSW_VERSAL2_ASUFW
+
+ifeq ($(BR2_TARGET_XILINX_EMBEDDEDSW_VERSAL2_PLM),y)
+define XILINX_EMBEDDEDSW_BUILD_VERSAL2_PLM
+	$(MAKE) -C $(@D)/lib/sw_apps/versal_plm/src/versal_2ve_2vm \
+		COMPILER=$(XILINX_EMBEDDEDSW_MICROBLAZE_CC) \
+		ARCHIVER=$(XILINX_EMBEDDEDSW_MICROBLAZE_AR) \
+		CC=$(XILINX_EMBEDDEDSW_MICROBLAZE_CC) \
+		CFLAGS=$(XILINX_EMBEDDEDSW_CFLAGS)
+endef
+
+define XILINX_EMBEDDEDSW_INSTALL_VERSAL2_PLM
+	$(INSTALL) -D -m 0755 \
+		$(@D)/lib/sw_apps/versal_plm/src/versal_2ve_2vm/plm.elf \
+		$(BINARIES_DIR)/plm.elf
+endef
+endif # BR2_TARGET_XILINX_EMBEDDEDSW_VERSAL2_PLM
 
 ifeq ($(BR2_TARGET_XILINX_EMBEDDEDSW_VERSAL_PLM),y)
 define XILINX_EMBEDDEDSW_BUILD_VERSAL_PLM
@@ -77,12 +109,16 @@ endef
 endif # BR2_TARGET_XILINX_EMBEDDEDSW_ZYNQMP_PMUFW
 
 define XILINX_EMBEDDEDSW_BUILD_CMDS
+	$(XILINX_EMBEDDEDSW_BUILD_VERSAL2_ASUFW)
+	$(XILINX_EMBEDDEDSW_BUILD_VERSAL2_PLM)
 	$(XILINX_EMBEDDEDSW_BUILD_VERSAL_PLM)
 	$(XILINX_EMBEDDEDSW_BUILD_VERSAL_PSMFW)
 	$(XILINX_EMBEDDEDSW_BUILD_ZYNQMP_PMUFW)
 endef
 
 define XILINX_EMBEDDEDSW_INSTALL_IMAGES_CMDS
+	$(XILINX_EMBEDDEDSW_INSTALL_VERSAL2_ASUFW)
+	$(XILINX_EMBEDDEDSW_INSTALL_VERSAL2_PLM)
 	$(XILINX_EMBEDDEDSW_INSTALL_VERSAL_PLM)
 	$(XILINX_EMBEDDEDSW_INSTALL_VERSAL_PSMFW)
 	$(XILINX_EMBEDDEDSW_INSTALL_ZYNQMP_PMUFW)