Config.in 8.9 KB

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  1. menu "Target options"
  2. config BR2_ARCH_IS_64
  3. bool
  4. config BR2_KERNEL_64_USERLAND_32
  5. bool
  6. config BR2_SOFT_FLOAT
  7. bool
  8. choice
  9. prompt "Target Architecture"
  10. default BR2_i386
  11. help
  12. Select the target architecture family to build for.
  13. config BR2_arcle
  14. bool "ARC (little endian)"
  15. help
  16. Synopsys' DesignWare ARC Processor Cores are a family of 32-bit CPUs
  17. that can be used from deeply embedded to high performance host
  18. applications. Little endian.
  19. config BR2_arceb
  20. bool "ARC (big endian)"
  21. help
  22. Synopsys' DesignWare ARC Processor Cores are a family of 32-bit CPUs
  23. that can be used from deeply embedded to high performance host
  24. applications. Big endian.
  25. config BR2_arm
  26. bool "ARM (little endian)"
  27. help
  28. ARM is a 32-bit reduced instruction set computer (RISC) instruction
  29. set architecture (ISA) developed by ARM Holdings. Little endian.
  30. http://www.arm.com/
  31. http://en.wikipedia.org/wiki/ARM
  32. config BR2_armeb
  33. bool "ARM (big endian)"
  34. help
  35. ARM is a 32-bit reduced instruction set computer (RISC) instruction
  36. set architecture (ISA) developed by ARM Holdings. Big endian.
  37. http://www.arm.com/
  38. http://en.wikipedia.org/wiki/ARM
  39. config BR2_aarch64
  40. bool "AArch64"
  41. select BR2_ARCH_IS_64
  42. help
  43. Aarch64 is a 64-bit architecture developed by ARM Holdings.
  44. http://www.arm.com/products/processors/instruction-set-architectures/armv8-architecture.php
  45. http://en.wikipedia.org/wiki/ARM
  46. config BR2_bfin
  47. bool "Blackfin"
  48. help
  49. The Blackfin is a family of 16 or 32-bit microprocessors developed,
  50. manufactured and marketed by Analog Devices.
  51. http://www.analog.com/
  52. http://en.wikipedia.org/wiki/Blackfin
  53. config BR2_i386
  54. bool "i386"
  55. help
  56. Intel i386 architecture compatible microprocessor
  57. http://en.wikipedia.org/wiki/I386
  58. config BR2_m68k
  59. bool "m68k"
  60. depends on BROKEN # ice in uclibc / inet_ntoa_r
  61. help
  62. Motorola 68000 family microprocessor
  63. http://en.wikipedia.org/wiki/M68k
  64. config BR2_microblazeel
  65. bool "Microblaze AXI (little endian)"
  66. help
  67. Soft processor core designed for Xilinx FPGAs from Xilinx. AXI bus
  68. based architecture (little endian)
  69. http://www.xilinx.com
  70. http://en.wikipedia.org/wiki/Microblaze
  71. config BR2_microblazebe
  72. bool "Microblaze non-AXI (big endian)"
  73. help
  74. Soft processor core designed for Xilinx FPGAs from Xilinx. PLB bus
  75. based architecture (non-AXI, big endian)
  76. http://www.xilinx.com
  77. http://en.wikipedia.org/wiki/Microblaze
  78. config BR2_mips
  79. bool "MIPS (big endian)"
  80. help
  81. MIPS is a RISC microprocessor from MIPS Technologies. Big endian.
  82. http://www.mips.com/
  83. http://en.wikipedia.org/wiki/MIPS_Technologies
  84. config BR2_mipsel
  85. bool "MIPS (little endian)"
  86. help
  87. MIPS is a RISC microprocessor from MIPS Technologies. Little endian.
  88. http://www.mips.com/
  89. http://en.wikipedia.org/wiki/MIPS_Technologies
  90. config BR2_mips64
  91. bool "MIPS64 (big endian)"
  92. select BR2_ARCH_IS_64
  93. help
  94. MIPS is a RISC microprocessor from MIPS Technologies. Big endian.
  95. http://www.mips.com/
  96. http://en.wikipedia.org/wiki/MIPS_Technologies
  97. config BR2_mips64el
  98. bool "MIPS64 (little endian)"
  99. select BR2_ARCH_IS_64
  100. help
  101. MIPS is a RISC microprocessor from MIPS Technologies. Little endian.
  102. http://www.mips.com/
  103. http://en.wikipedia.org/wiki/MIPS_Technologies
  104. config BR2_nios2
  105. bool "Nios II"
  106. help
  107. Nios II is a soft core processor from Altera Corporation.
  108. http://www.altera.com/
  109. http://en.wikipedia.org/wiki/Nios_II
  110. config BR2_powerpc
  111. bool "PowerPC"
  112. help
  113. PowerPC is a RISC architecture created by Apple-IBM-Motorola alliance.
  114. Big endian.
  115. http://www.power.org/
  116. http://en.wikipedia.org/wiki/Powerpc
  117. config BR2_powerpc64
  118. bool "PowerPC64 (big endian)"
  119. select BR2_ARCH_IS_64
  120. help
  121. PowerPC is a RISC architecture created by Apple-IBM-Motorola alliance.
  122. Big endian.
  123. http://www.power.org/
  124. http://en.wikipedia.org/wiki/Powerpc
  125. config BR2_powerpc64le
  126. bool "PowerPC64 (little endian)"
  127. select BR2_ARCH_IS_64
  128. help
  129. PowerPC is a RISC architecture created by Apple-IBM-Motorola alliance.
  130. Little endian.
  131. http://www.power.org/
  132. http://en.wikipedia.org/wiki/Powerpc
  133. config BR2_sh
  134. bool "SuperH"
  135. help
  136. SuperH (or SH) is a 32-bit reduced instruction set computer (RISC)
  137. instruction set architecture (ISA) developed by Hitachi.
  138. http://www.hitachi.com/
  139. http://en.wikipedia.org/wiki/SuperH
  140. config BR2_sh64
  141. bool "SuperH64"
  142. help
  143. SuperH64 (or SH) is a 64-bit reduced instruction set computer (RISC)
  144. instruction set architecture (ISA) developed by Hitachi.
  145. http://www.hitachi.com/
  146. http://en.wikipedia.org/wiki/SuperH
  147. config BR2_sparc
  148. bool "SPARC"
  149. help
  150. SPARC (from Scalable Processor Architecture) is a RISC instruction
  151. set architecture (ISA) developed by Sun Microsystems.
  152. http://www.oracle.com/sun
  153. http://en.wikipedia.org/wiki/Sparc
  154. config BR2_x86_64
  155. bool "x86_64"
  156. select BR2_ARCH_IS_64
  157. help
  158. x86-64 is an extension of the x86 instruction set (Intel i386
  159. architecture compatible microprocessor).
  160. http://en.wikipedia.org/wiki/X86_64
  161. config BR2_xtensa
  162. bool "Xtensa"
  163. help
  164. Xtensa is a Tensilica processor IP architecture.
  165. http://en.wikipedia.org/wiki/Xtensa
  166. http://www.tensilica.com/
  167. endchoice
  168. # The following string values are defined by the individual
  169. # Config.in.$ARCH files
  170. config BR2_ARCH
  171. string
  172. config BR2_ENDIAN
  173. string
  174. config BR2_GCC_TARGET_ARCH
  175. string
  176. config BR2_GCC_TARGET_ABI
  177. string
  178. config BR2_GCC_TARGET_CPU
  179. string
  180. config BR2_GCC_TARGET_CPU_REVISION
  181. string
  182. # The value of this option will be passed as --with-fpu=<value> when
  183. # building gcc (internal backend) or -mfpu=<value> in the toolchain
  184. # wrapper (external toolchain)
  185. config BR2_GCC_TARGET_FPU
  186. string
  187. # The value of this option will be passed as --with-float=<value> when
  188. # building gcc (internal backend) or -mfloat-abi=<value> in the toolchain
  189. # wrapper (external toolchain)
  190. config BR2_GCC_TARGET_FLOAT_ABI
  191. string
  192. # The value of this option will be passed as --with-mode=<value> when
  193. # building gcc (internal backend) or -m<value> in the toolchain
  194. # wrapper (external toolchain)
  195. config BR2_GCC_TARGET_MODE
  196. string
  197. # If the architecture has atomic operations, select this:
  198. config BR2_ARCH_HAS_ATOMICS
  199. bool
  200. # Must be selected by binary formats that support shared libraries.
  201. config BR2_BINFMT_SUPPORTS_SHARED
  202. bool
  203. # Set up target binary format
  204. choice
  205. prompt "Target Binary Format"
  206. default BR2_BINFMT_ELF if !(BR2_bfin || BR2_m68k)
  207. default BR2_BINFMT_FDPIC if BR2_bfin
  208. default BR2_BINFMT_FLAT if BR2_m68k
  209. config BR2_BINFMT_ELF
  210. bool "ELF"
  211. depends on !BR2_bfin && !BR2_m68k
  212. select BR2_BINFMT_SUPPORTS_SHARED
  213. help
  214. ELF (Executable and Linkable Format) is a format for libraries and
  215. executables used across different architectures and operating
  216. systems.
  217. config BR2_BINFMT_FDPIC
  218. bool "FDPIC"
  219. depends on BR2_bfin
  220. select BR2_BINFMT_SUPPORTS_SHARED
  221. help
  222. ELF FDPIC binaries are based on ELF, but allow the individual load
  223. segments of a binary to be located in memory independently of each
  224. other. This makes this format ideal for use in environments where no
  225. MMU is available.
  226. config BR2_BINFMT_FLAT
  227. bool "FLAT"
  228. depends on BR2_bfin || BR2_m68k
  229. help
  230. FLAT binary is a relatively simple and lightweight executable format
  231. based on the original a.out format. It is widely used in environment
  232. where no MMU is available.
  233. endchoice
  234. # Set up flat binary type
  235. choice
  236. prompt "FLAT Binary type"
  237. depends on BR2_BINFMT_FLAT
  238. default BR2_BINFMT_FLAT_ONE
  239. config BR2_BINFMT_FLAT_ONE
  240. bool "One memory region"
  241. help
  242. All segments are linked into one memory region.
  243. config BR2_BINFMT_FLAT_SEP_DATA
  244. bool "Separate data and code region"
  245. help
  246. Allow for the data and text segments to be separated and placed in
  247. different regions of memory.
  248. config BR2_BINFMT_FLAT_SHARED
  249. bool "Shared binary"
  250. # Even though this really generates shared binaries, there is no libdl
  251. # and dlopen() cannot be used. So packages that require shared
  252. # libraries cannot be built. Therefore, we don't select
  253. # BR2_BINFMT_SUPPORTS_SHARED and therefore force BR2_STATIC_LIBS.
  254. # Although this adds -static to the compilation, that's not a problem
  255. # because the -mid-shared-library option overrides it.
  256. help
  257. Allow to load and link indiviual FLAT binaries at run time.
  258. endchoice
  259. if BR2_arcle || BR2_arceb
  260. source "arch/Config.in.arc"
  261. endif
  262. if BR2_arm || BR2_armeb
  263. source "arch/Config.in.arm"
  264. endif
  265. if BR2_aarch64
  266. source "arch/Config.in.aarch64"
  267. endif
  268. if BR2_bfin
  269. source "arch/Config.in.bfin"
  270. endif
  271. if BR2_m68k
  272. source "arch/Config.in.m68k"
  273. endif
  274. if BR2_microblazeel || BR2_microblazebe
  275. source "arch/Config.in.microblaze"
  276. endif
  277. if BR2_mips || BR2_mips64 || BR2_mipsel || BR2_mips64el
  278. source "arch/Config.in.mips"
  279. endif
  280. if BR2_nios2
  281. source "arch/Config.in.nios2"
  282. endif
  283. if BR2_powerpc || BR2_powerpc64 || BR2_powerpc64le
  284. source "arch/Config.in.powerpc"
  285. endif
  286. if BR2_sh || BR2_sh64
  287. source "arch/Config.in.sh"
  288. endif
  289. if BR2_sparc
  290. source "arch/Config.in.sparc"
  291. endif
  292. if BR2_i386 || BR2_x86_64
  293. source "arch/Config.in.x86"
  294. endif
  295. if BR2_xtensa
  296. source "arch/Config.in.xtensa"
  297. endif
  298. endmenu # Target options