Config.in.arm 12 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419
  1. # arm cpu features
  2. config BR2_ARM_CPU_HAS_NEON
  3. bool
  4. # for some cores, NEON support is optional
  5. config BR2_ARM_CPU_MAYBE_HAS_NEON
  6. bool
  7. # for some cores, VFPv2 is optional
  8. config BR2_ARM_CPU_MAYBE_HAS_VFPV2
  9. bool
  10. config BR2_ARM_CPU_HAS_VFPV2
  11. bool
  12. # for some cores, VFPv3 is optional
  13. config BR2_ARM_CPU_MAYBE_HAS_VFPV3
  14. bool
  15. select BR2_ARM_CPU_MAYBE_HAS_VFPV2
  16. config BR2_ARM_CPU_HAS_VFPV3
  17. bool
  18. select BR2_ARM_CPU_HAS_VFPV2
  19. # for some cores, VFPv4 is optional
  20. config BR2_ARM_CPU_MAYBE_HAS_VFPV4
  21. bool
  22. select BR2_ARM_CPU_MAYBE_HAS_VFPV3
  23. config BR2_ARM_CPU_HAS_VFPV4
  24. bool
  25. select BR2_ARM_CPU_HAS_VFPV3
  26. config BR2_ARM_CPU_HAS_ARM
  27. bool
  28. config BR2_ARM_CPU_HAS_THUMB
  29. bool
  30. config BR2_ARM_CPU_HAS_THUMB2
  31. bool
  32. config BR2_ARM_CPU_ARMV4
  33. bool
  34. config BR2_ARM_CPU_ARMV5
  35. bool
  36. config BR2_ARM_CPU_ARMV6
  37. bool
  38. config BR2_ARM_CPU_ARMV7A
  39. bool
  40. choice
  41. prompt "Target Architecture Variant"
  42. depends on BR2_arm || BR2_armeb
  43. default BR2_arm926t
  44. help
  45. Specific CPU variant to use
  46. config BR2_arm920t
  47. bool "arm920t"
  48. select BR2_ARM_CPU_HAS_ARM
  49. select BR2_ARM_CPU_HAS_THUMB
  50. select BR2_ARM_CPU_ARMV4
  51. config BR2_arm922t
  52. bool "arm922t"
  53. select BR2_ARM_CPU_HAS_ARM
  54. select BR2_ARM_CPU_HAS_THUMB
  55. select BR2_ARM_CPU_ARMV4
  56. config BR2_arm926t
  57. bool "arm926t"
  58. select BR2_ARM_CPU_HAS_ARM
  59. select BR2_ARM_CPU_MAYBE_HAS_VFPV2
  60. select BR2_ARM_CPU_HAS_THUMB
  61. select BR2_ARM_CPU_ARMV5
  62. config BR2_arm1136jf_s
  63. bool "arm1136jf-s"
  64. select BR2_ARM_CPU_HAS_ARM
  65. select BR2_ARM_CPU_HAS_VFPV2
  66. select BR2_ARM_CPU_HAS_THUMB
  67. select BR2_ARM_CPU_ARMV6
  68. config BR2_arm1176jz_s
  69. bool "arm1176jz-s"
  70. select BR2_ARM_CPU_HAS_ARM
  71. select BR2_ARM_CPU_HAS_THUMB
  72. select BR2_ARM_CPU_ARMV6
  73. config BR2_arm1176jzf_s
  74. bool "arm1176jzf-s"
  75. select BR2_ARM_CPU_HAS_ARM
  76. select BR2_ARM_CPU_HAS_VFPV2
  77. select BR2_ARM_CPU_HAS_THUMB
  78. select BR2_ARM_CPU_ARMV6
  79. config BR2_cortex_a5
  80. bool "cortex-A5"
  81. select BR2_ARM_CPU_HAS_ARM
  82. select BR2_ARM_CPU_MAYBE_HAS_NEON
  83. select BR2_ARM_CPU_MAYBE_HAS_VFPV4
  84. select BR2_ARM_CPU_HAS_THUMB2
  85. select BR2_ARM_CPU_ARMV7A
  86. config BR2_cortex_a7
  87. bool "cortex-A7"
  88. select BR2_ARM_CPU_HAS_ARM
  89. select BR2_ARM_CPU_HAS_NEON
  90. select BR2_ARM_CPU_HAS_VFPV4
  91. select BR2_ARM_CPU_HAS_THUMB2
  92. select BR2_ARM_CPU_ARMV7A
  93. config BR2_cortex_a8
  94. bool "cortex-A8"
  95. select BR2_ARM_CPU_HAS_ARM
  96. select BR2_ARM_CPU_HAS_NEON
  97. select BR2_ARM_CPU_HAS_VFPV3
  98. select BR2_ARM_CPU_HAS_THUMB2
  99. select BR2_ARM_CPU_ARMV7A
  100. config BR2_cortex_a9
  101. bool "cortex-A9"
  102. select BR2_ARM_CPU_HAS_ARM
  103. select BR2_ARM_CPU_MAYBE_HAS_NEON
  104. select BR2_ARM_CPU_MAYBE_HAS_VFPV3
  105. select BR2_ARM_CPU_HAS_THUMB2
  106. select BR2_ARM_CPU_ARMV7A
  107. config BR2_cortex_a12
  108. bool "cortex-A12"
  109. select BR2_ARM_CPU_HAS_ARM
  110. select BR2_ARM_CPU_HAS_NEON
  111. select BR2_ARM_CPU_HAS_VFPV4
  112. select BR2_ARM_CPU_HAS_THUMB2
  113. select BR2_ARM_CPU_ARMV7A
  114. config BR2_cortex_a15
  115. bool "cortex-A15"
  116. select BR2_ARM_CPU_HAS_ARM
  117. select BR2_ARM_CPU_HAS_NEON
  118. select BR2_ARM_CPU_HAS_VFPV4
  119. select BR2_ARM_CPU_HAS_THUMB2
  120. select BR2_ARM_CPU_ARMV7A
  121. config BR2_fa526
  122. bool "fa526/626"
  123. select BR2_ARM_CPU_HAS_ARM
  124. select BR2_ARM_CPU_ARMV4
  125. config BR2_pj4
  126. bool "pj4"
  127. select BR2_ARM_CPU_HAS_ARM
  128. select BR2_ARM_CPU_HAS_VFPV3
  129. select BR2_ARM_CPU_ARMV7A
  130. config BR2_strongarm
  131. bool "strongarm sa110/sa1100"
  132. select BR2_ARM_CPU_HAS_ARM
  133. select BR2_ARM_CPU_ARMV4
  134. config BR2_xscale
  135. bool "xscale"
  136. select BR2_ARM_CPU_HAS_ARM
  137. select BR2_ARM_CPU_HAS_THUMB
  138. select BR2_ARM_CPU_ARMV5
  139. config BR2_iwmmxt
  140. bool "iwmmxt"
  141. select BR2_ARM_CPU_HAS_ARM
  142. select BR2_ARM_CPU_ARMV5
  143. endchoice
  144. choice
  145. prompt "Target ABI"
  146. depends on BR2_arm || BR2_armeb
  147. default BR2_ARM_EABI
  148. help
  149. Application Binary Interface to use. The Application Binary
  150. Interface describes the calling conventions (how arguments
  151. are passed to functions, how the return value is passed, how
  152. system calls are made, etc.).
  153. config BR2_ARM_EABI
  154. bool "EABI"
  155. help
  156. The EABI is currently the standard ARM ABI, which is used in
  157. most projects. It supports both the 'soft' floating point
  158. model (in which floating point instructions are emulated in
  159. software) and the 'softfp' floating point model (in which
  160. floating point instructions are executed using an hardware
  161. floating point unit, but floating point arguments to
  162. functions are passed in integer registers).
  163. The 'softfp' floating point model is link-compatible with
  164. the 'soft' floating point model, i.e you can link a library
  165. built 'soft' with some other code built 'softfp'.
  166. However, passing the floating point arguments in integer
  167. registers is a bit inefficient, so if your ARM processor has
  168. a floating point unit, and you don't have pre-compiled
  169. 'soft' or 'softfp' code, using the EABIhf ABI will provide
  170. better floating point performances.
  171. If your processor does not have a floating point unit, then
  172. you must use this ABI.
  173. config BR2_ARM_EABIHF
  174. bool "EABIhf"
  175. depends on BR2_ARM_CPU_MAYBE_HAS_VFPV2 || BR2_ARM_CPU_HAS_VFPV2
  176. help
  177. The EABIhf is an extension of EABI which supports the 'hard'
  178. floating point model. This model uses the floating point
  179. unit to execute floating point instructions, and passes
  180. floating point arguments in floating point registers.
  181. It is more efficient than EABI for floating point related
  182. workload. However, it does not allow to link against code
  183. that has been pre-built for the 'soft' or 'softfp' floating
  184. point models.
  185. If your processor has a floating point unit, and you don't
  186. depend on existing pre-compiled code, this option is most
  187. likely the best choice.
  188. endchoice
  189. config BR2_ARM_ENABLE_NEON
  190. bool "Enable NEON SIMD extension support"
  191. depends on BR2_ARM_CPU_MAYBE_HAS_NEON
  192. select BR2_ARM_CPU_HAS_NEON
  193. help
  194. For some CPU cores, the NEON SIMD extension is optional.
  195. Select this option if you are certain your particular
  196. implementation has NEON support and you want to use it.
  197. choice
  198. prompt "Floating point strategy"
  199. depends on BR2_ARM_EABI || BR2_ARM_EABIHF
  200. default BR2_ARM_FPU_VFPV4D16 if BR2_ARM_CPU_HAS_VFPV4
  201. default BR2_ARM_FPU_VFPV3D16 if BR2_ARM_CPU_HAS_VFPV3
  202. default BR2_ARM_FPU_VFPV2 if BR2_ARM_CPU_HAS_VFPV2
  203. default BR2_ARM_SOFT_FLOAT if !BR2_ARM_CPU_HAS_VFPV2
  204. config BR2_ARM_SOFT_FLOAT
  205. bool "Soft float"
  206. depends on BR2_ARM_EABI
  207. select BR2_SOFT_FLOAT
  208. help
  209. This option allows to use software emulated floating
  210. point. It should be used for ARM cores that do not include a
  211. Vector Floating Point unit, such as ARMv5 cores (ARM926 for
  212. example) or certain ARMv6 cores.
  213. config BR2_ARM_FPU_VFPV2
  214. bool "VFPv2"
  215. depends on BR2_ARM_CPU_HAS_VFPV2 || BR2_ARM_CPU_MAYBE_HAS_VFPV2
  216. help
  217. This option allows to use the VFPv2 floating point unit, as
  218. available in some ARMv5 processors (ARM926EJ-S) and some
  219. ARMv6 processors (ARM1136JF-S, ARM1176JZF-S and ARM11
  220. MPCore).
  221. Note that this option is also safe to use for newer cores
  222. such as Cortex-A, because the VFPv3 and VFPv4 units are
  223. backward compatible with VFPv2.
  224. config BR2_ARM_FPU_VFPV3
  225. bool "VFPv3"
  226. depends on BR2_ARM_CPU_HAS_VFPV3 || BR2_ARM_CPU_MAYBE_HAS_VFPV3
  227. help
  228. This option allows to use the VFPv3 floating point unit, as
  229. available in some ARMv7 processors (Cortex-A{8, 9}). This
  230. option requires a VFPv3 unit that has 32 double-precision
  231. registers, which is not necessarily the case in all SOCs
  232. based on Cortex-A{8, 9}. If you're unsure, use VFPv3-D16
  233. instead, which is guaranteed to work on all Cortex-A{8, 9}.
  234. Note that this option is also safe to use for newer cores
  235. that have a VFPv4 unit, because VFPv4 is backward compatible
  236. with VFPv3. They must of course also have 32
  237. double-precision registers.
  238. config BR2_ARM_FPU_VFPV3D16
  239. bool "VFPv3-D16"
  240. depends on BR2_ARM_CPU_HAS_VFPV3 || BR2_ARM_CPU_MAYBE_HAS_VFPV3
  241. help
  242. This option allows to use the VFPv3 floating point unit, as
  243. available in some ARMv7 processors (Cortex-A{8, 9}). This
  244. option requires a VFPv3 unit that has 16 double-precision
  245. registers, which is generally the case in all SOCs based on
  246. Cortex-A{8, 9}, even though VFPv3 is technically optional on
  247. Cortex-A9. This is the safest option for those cores.
  248. Note that this option is also safe to use for newer cores
  249. such that have a VFPv4 unit, because the VFPv4 is backward
  250. compatible with VFPv3.
  251. config BR2_ARM_FPU_VFPV4
  252. bool "VFPv4"
  253. depends on BR2_ARM_CPU_HAS_VFPV4 || BR2_ARM_CPU_MAYBE_HAS_VFPV4
  254. help
  255. This option allows to use the VFPv4 floating point unit, as
  256. available in some ARMv7 processors (Cortex-A{5, 7, 12,
  257. 15}). This option requires a VFPv4 unit that has 32
  258. double-precision registers, which is not necessarily the
  259. case in all SOCs based on Cortex-A{5, 7, 12, 15}. If you're
  260. unsure, you should probably use VFPv4-D16 instead.
  261. Note that if you want binary code that works on all ARMv7
  262. cores, including the earlier Cortex-A{8, 9}, you should
  263. instead select VFPv3.
  264. config BR2_ARM_FPU_VFPV4D16
  265. bool "VFPv4-D16"
  266. depends on BR2_ARM_CPU_HAS_VFPV4 || BR2_ARM_CPU_MAYBE_HAS_VFPV4
  267. help
  268. This option allows to use the VFPv4 floating point unit, as
  269. available in some ARMv7 processors (Cortex-A{5, 7, 12,
  270. 15}). This option requires a VFPv4 unit that has 16
  271. double-precision registers, which is always available on
  272. Cortex-A12 and Cortex-A15, but optional on Cortex-A5 and
  273. Cortex-A7.
  274. Note that if you want binary code that works on all ARMv7
  275. cores, including the earlier Cortex-A{8, 9}, you should
  276. instead select VFPv3-D16.
  277. config BR2_ARM_FPU_NEON
  278. bool "NEON"
  279. depends on BR2_ARM_CPU_HAS_NEON
  280. help
  281. This option allows to use the NEON SIMD unit, as available
  282. in some ARMv7 processors, as a floating-point unit. It
  283. should however be noted that using NEON for floating point
  284. operations doesn't provide a complete compatibility with the
  285. IEEE 754.
  286. config BR2_ARM_FPU_NEON_VFPV4
  287. bool "NEON/VFPv4"
  288. depends on BR2_ARM_CPU_HAS_VFPV4 || BR2_ARM_CPU_MAYBE_HAS_VFPV4
  289. depends on BR2_ARM_CPU_HAS_NEON
  290. help
  291. This option allows to use both the VFPv4 and the NEON SIMD
  292. units for floating point operations. Note that some ARMv7
  293. cores do not necessarily have VFPv4 and/or NEON support, for
  294. example on Cortex-A5 and Cortex-A7, support for VFPv4 and
  295. NEON is optional.
  296. endchoice
  297. choice
  298. prompt "ARM instruction set"
  299. config BR2_ARM_INSTRUCTIONS_ARM
  300. bool "ARM"
  301. depends on BR2_ARM_CPU_HAS_ARM
  302. help
  303. This option instructs the compiler to generate regular ARM
  304. instructions, that are all 32 bits wide.
  305. config BR2_ARM_INSTRUCTIONS_THUMB
  306. bool "Thumb"
  307. depends on BR2_ARM_CPU_HAS_THUMB
  308. help
  309. This option instructions the compiler to generate Thumb
  310. instructions, which allows to mix 16 bits instructions and
  311. 32 bits instructions. This generally provides a much smaller
  312. compiled binary size.
  313. config BR2_ARM_INSTRUCTIONS_THUMB2
  314. bool "Thumb2"
  315. depends on BR2_ARM_CPU_HAS_THUMB2
  316. help
  317. This option instructions the compiler to generate Thumb2
  318. instructions, which allows to mix 16 bits instructions and
  319. 32 bits instructions. This generally provides a much smaller
  320. compiled binary size.
  321. endchoice
  322. config BR2_ARCH
  323. default "arm" if BR2_arm
  324. default "armeb" if BR2_armeb
  325. config BR2_ENDIAN
  326. default "LITTLE" if BR2_arm
  327. default "BIG" if BR2_armeb
  328. config BR2_ARCH_HAS_ATOMICS
  329. default y
  330. config BR2_GCC_TARGET_CPU
  331. default "arm920t" if BR2_arm920t
  332. default "arm922t" if BR2_arm922t
  333. default "arm926ej-s" if BR2_arm926t
  334. default "arm1136j-s" if BR2_arm1136j_s
  335. default "arm1136jf-s" if BR2_arm1136jf_s
  336. default "arm1176jz-s" if BR2_arm1176jz_s
  337. default "arm1176jzf-s" if BR2_arm1176jzf_s
  338. default "cortex-a5" if BR2_cortex_a5
  339. default "cortex-a7" if BR2_cortex_a7
  340. default "cortex-a8" if BR2_cortex_a8
  341. default "cortex-a9" if BR2_cortex_a9
  342. default "cortex-a12" if BR2_cortex_a12
  343. default "cortex-a15" if BR2_cortex_a15
  344. default "fa526" if BR2_fa526
  345. default "marvell-pj4" if BR2_pj4
  346. default "strongarm" if BR2_strongarm
  347. default "xscale" if BR2_xscale
  348. default "iwmmxt" if BR2_iwmmxt
  349. config BR2_GCC_TARGET_ABI
  350. default "aapcs-linux"
  351. config BR2_GCC_TARGET_FPU
  352. default "vfp" if BR2_ARM_FPU_VFPV2
  353. default "vfpv3" if BR2_ARM_FPU_VFPV3
  354. default "vfpv3-d16" if BR2_ARM_FPU_VFPV3D16
  355. default "vfpv4" if BR2_ARM_FPU_VFPV4
  356. default "vfpv4-d16" if BR2_ARM_FPU_VFPV4D16
  357. default "neon" if BR2_ARM_FPU_NEON
  358. default "neon-vfpv4" if BR2_ARM_FPU_NEON_VFPV4
  359. config BR2_GCC_TARGET_FLOAT_ABI
  360. default "soft" if BR2_ARM_SOFT_FLOAT
  361. default "softfp" if !BR2_ARM_SOFT_FLOAT && BR2_ARM_EABI
  362. default "hard" if !BR2_ARM_SOFT_FLOAT && BR2_ARM_EABIHF
  363. config BR2_GCC_TARGET_MODE
  364. default "arm" if BR2_ARM_INSTRUCTIONS_ARM
  365. default "thumb" if BR2_ARM_INSTRUCTIONS_THUMB || BR2_ARM_INSTRUCTIONS_THUMB2